Hsin-Ming Chen
90Patents
13h-index
62Co-inventors
87Inventor score
Filing activity: Aug 10, 1999 → Nov 29, 2021
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6576558B1 | High aspect ratio shallow trench using silicon implanted oxide | Electricity | 59 | Expired |
| US9935113B2 | Non-volatile memory and method for programming and reading a memory array having the same | Emerging Cross-Sectional Technologies | 57 | Active |
| US8592886B2 | Erasable programmable single-ploy nonvolatile memory | Physics | 50 | Active |
| US9613714B1 | One time programming memory cell and memory array for physically unclonable function technology and associated random code generating method | Emerging Cross-Sectional Technologies | 43 | Active |
| US7250654B2 | Non-volatile memory device | Electricity | 39 | Expired |
| US7903472B2 | Operating method of non-volatile memory | Electricity | 37 | Active |
| US6787405B2 | Method of fabricating liquid crystal display devices integrated with driving circuit | Physics | 35 | Expired |
| US7172940B1 | Method of fabricating an embedded non-volatile memory device | Emerging Cross-Sectional Technologies | 33 | Expired |
| US7262457B2 | Non-volatile memory cell | Physics | 32 | Expired |
| US7209392B2 | Single poly non-volatile memory | Electricity | 27 | Expired |
| US8941167B2 | Erasable programmable single-ploy nonvolatile memory | Electricity | 16 | Active |
| US6818936B2 | Scaled EEPROM cell by metal-insulator-metal (MIM) coupling | Electricity | 16 | Expired |
| US6812083B2 | Fabrication method for non-volatile memory | Physics | 14 | Expired |
| US6734055B1 | Multi-level (4 state/2-bit) stacked gate flash memory cell | Electricity | 12 | Expired |
| US8344445B2 | Non-volatile semiconductor memory cell with dual functions | Electricity | 11 | Active |
| US9281074B2 | One time programmable memory cell capable of reducing leakage current and preventing slow bit response | Electricity | 11 | Active |
| US6586765B2 | Wafer-level antenna effect detection pattern for VLSI | Electricity | 10 | Expired |
| US6245657A | Self-aligned, low contact resistance, via fabrication process | Electricity | 10 | Expired |
| US6822286B2 | Cmos-compatible read only memory and method for fabricating the same | Electricity | 9 | Expired |
| US10649735B2 | Security system with entropy bits | Emerging Cross-Sectional Technologies | 9 | Active |
| US6372525B1 | Wafer-level antenna effect detection pattern for VLSI | Electricity | 8 | Expired |
| US7660087B2 | Electrostatic discharge avoiding circuit | Electricity | 8 | Active |
| US6407790B1 | Method of fabricating a liquid crystal display | Physics | 8 | Expired |
| US8384155B2 | Semiconductor capacitor | Physics | 8 | Active |
| US7417897B2 | Method for reading a single-poly single-transistor non-volatile memory cell | Physics | 7 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.