Stacked-die package for battery power management
US8344519B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 18, 2011 |
| Grant date | Jan 1, 2013 |
| Priority date | — |
| Expiry date | Apr 18, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19043
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A battery protection package assembly is disclosed. The assembly includes a power control integrated circuit (IC) with pins for a supply voltage input (VCC) and a ground (VSS) on a first side of the power control IC. First and second common-drain metal oxide semiconductor field effect transistors (MOSFETs) are electrically coupled to the power control IC. The power control IC and the first and second common-drain metal oxide semiconductor field effect transistors (MOSFET) are co-packaged on a common die pad. The power control IC is vertically stacked on top of one or more of the first and second common-drain MOSFETs. Leads coupled to a supply voltage input (VCC) and a ground (VSS) of the power control IC are on a first side of the common die pad.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.