Victim cache replacement

US8347037B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Guy L. Guthrie · Austin, US
• Thomas L. Jeremiah · Endwell, US
• William L. McNeil · Apex, US
• Piyush C. Patel · Cary, US
• William J. Starke · Round Rock, US
• Jeffrey A. Stuecheli · Austin, US

Key dates

• Filing date: Oct 22, 2008
• Grant date: Jan 1, 2013
• Expiry date: Apr 27, 2030

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y02D10/00
• WIPO field: Computer technology
• WIPO sector: Electrical engineering

Abstract

A data processing system includes a processor core having an associated upper level cache and a lower level victim cache. In response to a memory access request of the processor core that specifies a non-modifying access to a target coherency granule, a determination is made whether the memory access request hits or misses in a directory of the lower level victim cache. In response to determining that the memory access request hits in the lower level victim cache in a data-valid coherence state, the lower level victim cache provides the target coherency granule of the memory access request to the upper level cache. The lower level victim cache preserves the target coherency granule in the lower level victim cache in a shared coherence state if the memory access request is of a first type and invalidates the target coherency granule if the memory access request is of a second type.