Semiconductor device with reduced junction leakage and an associated method of forming such a semiconductor device
US8349716B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Oct 25, 2010 |
| Grant date | Jan 8, 2013 |
| Priority date | — |
| Expiry date | Jan 4, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0277
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed is a semiconductor device having a p-n junction with reduced junction leakage in the presence of metal silicide defects that extend to the junction and a method of forming the device. Specifically, a semiconductor layer having a p-n junction is formed. A metal silicide layer is formed on the semiconductor layer and a dopant is implanted into the metal silicide layer. An anneal process is performed causing the dopant to migrate toward the metal silicide-semiconductor layer interface such that the peak concentration of the dopant will be within a portion of the metal silicide layer bordering the metal silicide-semiconductor layer interface and encompassing the defects. As a result, the silicide to silicon contact is effectively engineered to increase the Schottky barrier height at the defect, which in turn drastically reduces any leakage that would otherwise occur, when the p-n junction is in reverse polarity.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.