Compensated gate MISFET and method for fabricating the same
US8350294B2 · kind B2 · utility
10Cited by
4References
12Claims
0Family size
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Key dates
| Filing date | Apr 8, 2010 |
| Grant date | Jan 8, 2013 |
| Priority date | — |
| Expiry date | Aug 9, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/8503
Abstract
A MISFET, such as a GaN transistor, with low gate leakage. In one embodiment, the gate leakage is reduced with a compensated GaN layer below the gate contact and above the barrier layer. In another embodiment, the gate leakage is reduced by employing a semi-insulating layer below the gate contact and above the barrier layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.