Stressed transistor with improved metastability

US8361859B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Thomas N. Adam · Slingerlands, US
• Stephen W. Bedell · Wappingers Falls, US
• Abhishek Dube · Fishkill, US
• Eric C. Harley · Lagrangeville, US
• Judson R. Holt · Wappingers Falls, US
• Alexander Reznicek · Troy, US
• Devendra K. Sadana · Pleasantville, US
• Dominic J. Schepis · Wappingers Falls, US
• Matthew W. Stoker · Poughkeepsie, US
• Keith H. Tabakman · Newburgh, US

Key dates

• Filing date: Nov 9, 2010
• Grant date: Jan 29, 2013
• Expiry date: Jan 4, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D62/021
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

An embedded, strained epitaxial semiconductor material, i.e., an embedded stressor element, is formed at the footprint of at least one pre-fabricated field effect transistor that includes at least a patterned gate stack, a source region and a drain region. As a result, the metastability of the embedded, strained epitaxial semiconductor material is preserved and implant and anneal based relaxation mechanisms are avoided since the implants and anneals are performed prior to forming the embedded, strained epitaxial semiconductor material.