Pseudo-LRU cache line replacement for a high-speed cache
US8364900B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 12, 2008 |
| Grant date | Jan 29, 2013 |
| Priority date | — |
| Expiry date | Dec 6, 2030 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments of the present invention provide a system that replaces an entry in a least-recently-used way in a skewed-associative cache. The system starts by receiving a cache line address. The system then generates two or more indices using the cache line address. Next, the system generates two or more intermediate indices using the two or more indices. The system then uses at least one of the two or more indices or the two or more intermediate indices to perform a lookup in one or more lookup tables, wherein the lookup returns a value which identifies a least-recently-used way. Next, the system replaces the entry in the least-recently-used way.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.