Junctionless TFT NAND flash memory
US8395942B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 2, 2010 |
| Grant date | Mar 12, 2013 |
| Priority date | — |
| Expiry date | Apr 17, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B43/30
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A method of making a NAND string includes forming a semiconductor layer over a major surface of a substrate, patterning the semiconductor layer into an elongated nanowire shaped channel extending substantially parallel to the major surface of the substrate, forming a tunneling dielectric layer over the channel, forming a plurality of charge storage regions over the tunneling dielectric layer and undercutting the channel using the plurality of charge storage regions as mask. The channel has a narrower width than each charge storage region width, and an overhanging portion of each of the plurality of charge storage regions overhangs the channel. The method also includes forming a blocking dielectric layer over the plurality of charge storage regions, such that the blocking dielectric layer fills a space below the overhanging portion of each of the plurality of charge storage regions and forming a plurality of control gates over the blocking dielectric layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.