Silicide contact formation
US8404589B2 · kind B2 · utility
0Cited by
7References
13Claims
0Family size
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Key dates
| Filing date | Apr 6, 2010 |
| Grant date | Mar 26, 2013 |
| Priority date | — |
| Expiry date | Jun 4, 2030 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/6219
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a silicide contact includes depositing a metal layer on silicon such that the metal layer intermixes with the silicon to form an intermixed region on the silicon; removing an unintermixed portion of the metal layer from the intermixed region; and annealing the intermixed region to form a silicide contact on the silicon. A semiconductor device comprising a silicide contact located over a silicon layer of the semiconductor device, the silicide contact comprising nickel (Ni) and silicon (Si) and having Ni amount equivalent to a thickness of about 21 angstroms or less.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.