Method to prevent surface decomposition of III-V compound semiconductors
US8415772B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 9, 2012 |
| Grant date | Apr 9, 2013 |
| Priority date | — |
| Expiry date | Aug 9, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of preventing surface decomposition of a III-V compound semiconductor is provided. The method includes forming a silicon film having a thickness from 10 Å to 400 Å on a surface of an III-V compound semiconductor. After forming the silicon film onto the surface of the III-V compound semiconductor, a high performance semiconductor device including, for example, a MOSFET, can be formed on the capped/passivated III-V compound semiconductor. During the MOSFET fabrication, a high k dielectric can be formed on the capped/passivated III-V compound semiconductor and thereafter, activated source and drain regions can be formed into the III-V compound semiconductor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.