Method and system for routing electrical connections of semiconductor chips
US8415803B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 31, 2010 |
| Grant date | Apr 9, 2013 |
| Priority date | — |
| Expiry date | Jan 3, 2031 |
Classification
- Technology area (CPC —)General
Abstract
A method and a system for routing electrical connections are disclosed. A semiconductor device includes a first semiconductor chip and a routing plane having a plurality of routing lines. A first connecting line is electrically coupled to the first semiconductor chip and one of the plurality of routing lines and a second connecting line is electrically coupled to the one of the plurality of routing lines and to one of a second semiconductor chip or a first external contact element.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.