Thomas Ort
15Patents
2h-index
14Co-inventors
47Inventor score
Filing activity: Aug 31, 2010 → Feb 26, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10546817B2 | Face-up fan-out electronic package with passive components using a support | Electricity | 2 | Active |
| US10867934B2 | Component magnetic shielding for microelectronic devices | Electricity | 2 | Active |
| US10665522B2 | Package including an integrated routing layer and a molded routing layer | Electricity | 2 | Active |
| US8598709B2 | Method and system for routing electrical connections of semiconductor chips | Electricity | 1 | Active |
| US10403580B2 | Molded substrate package in fan-out wafer level package | Electricity | 1 | Active |
| US11404339B2 | Fan out package with integrated peripheral devices and methods | Electricity | 0 | Active |
| US11508637B2 | Fan out package and methods | Electricity | 0 | Active |
| US11211337B2 | Face-up fan-out electronic package with passive components using a support | Electricity | 0 | Active |
| US10699980B2 | Fan out package with integrated peripheral devices and methods | Electricity | 0 | Active |
| US12057364B2 | Package formation methods including coupling a molded routing layer to an integrated routing layer | Electricity | 0 | Active |
| US10720393B2 | Molded substrate package in fan-out wafer level package | Electricity | 0 | Active |
| US11764187B2 | Semiconductor packages, and methods for forming semiconductor packages | Electricity | 0 | Active |
| US11955395B2 | Fan out package with integrated peripheral devices and methods | Electricity | 0 | Active |
| US12362251B2 | Fan out package with integrated peripheral devices and methods | Electricity | 0 | Active |
| US8415803B2 | Method and system for routing electrical connections of semiconductor chips | General | 0 | Revoked |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.