Bulk fin-field effect transistors with well defined isolation
US8420459B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 20, 2011 |
| Grant date | Apr 16, 2013 |
| Priority date | — |
| Expiry date | Oct 20, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/62
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A fin field-effect-transistor fabricated by forming a dummy fin structure on a semiconductor substrate. A dielectric layer is formed on the semiconductor substrate. The dielectric layer surrounds the dummy fin structure. The dummy fin structure is removed to form a cavity within the dielectric layer. The cavity exposes a portion of the semiconductor substrate thereby forming an exposed portion of the semiconductor substrate within the cavity. A dopant is implanted into the exposed portion of the semiconductor substrate within the cavity thereby creating a dopant implanted exposed portion of the semiconductor substrate within the cavity. A semiconductor layer is epitaxially grown within the cavity atop the dopant implanted exposed portion of the semiconductor substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.