Method of reducing contamination by providing an etch stop layer at the substrate edge
US8426312B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 14, 2006 |
| Grant date | Apr 23, 2013 |
| Priority date | — |
| Expiry date | Jul 30, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/6708
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
By providing an etch stop layer selectively at the bevel, at least one additional wet chemical bevel etch process may be performed prior to or during the formation of a metallization layer without affecting the substrate material. Hence, the dielectric material, especially the low-k dielectric material, may be reliably removed from the bevel prior to the formation of any barrier and metal layers. The etch stop layer may be formed at an early manufacturing stage so that a bevel etch process may be performed at any desired stage of the formation of circuit elements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.