Method and apparatus for pattern collapse free wet processing of semiconductor devices

US8440573B2 · kind B2 · utility

Assignee

• Lam Research Corporation · US

Inventors

• Katrina Mikhaylichenko · San Jose, US
• Denis Syomin · San Jose, US
• Qian Fu · Pleasanton, US
• Glenn W. Gale · Austin, US
• Shenjian Liu · Fremont, US
• Mark Wilcoxson · Oakland, US

Key dates

• Filing date: Jan 26, 2010
• Grant date: May 14, 2013
• Expiry date: Sep 4, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/31111
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A method is provided for processing a wafer used in fabricating semiconductor devices. The method can comprise forming high-aspect ratio features on the wafer, which is followed by wet processing and drying. During drying, pattern collapse can occur. This pattern collapse can be repaired to allow for additional processing of the wafer. In some instance, pattern collapse can be repaired via etching where the etching breaks bonds that can have formed during pattern collapse.