Uniform high-k metal gate stacks by adjusting threshold voltage for sophisticated transistors by diffusing a metal species prior to gate patterning

US8445344B2 · kind B2 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Richard J. Carter · Los Altos, US
• Falk Graetsch · Dresden, DE
• Martin Trentzsch · Dresden, DE
• Sven Beyer · Dresden, DE
• Berthold Reimer · Dresden, DE
• Robert Binder · Dresden, DE
• Boris Bayha · Dresden, DE

Key dates

• Filing date: May 26, 2010
• Grant date: May 21, 2013
• Expiry date: Jan 14, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D84/038
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Sophisticated gate electrode structures for N-channel transistors and P-channel transistors are patterned on the basis of substantially the same configuration while, nevertheless, the work function adjustment may be accomplished in an early manufacturing stage. For this purpose, diffusion layer and cap layer materials are removed after incorporating the desired work function metal species into the high-k dielectric material and subsequently a common gate layer stack is deposited and subsequently patterned.