Integrated circuit packaging system with post and method of manufacture thereof
US8460968B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 17, 2010 |
| Grant date | Jun 11, 2013 |
| Priority date | — |
| Expiry date | Oct 14, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/19105
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacture of an integrated circuit packaging system includes: providing a stack substrate with a component side; connecting an integrated circuit component to the component side; attaching a conductive post to the component side and adjacent the integrated circuit component, the conductive post having a protruded end above the integrated circuit component; forming a protection layer on a top and sides of the protruded end, the protection layer having a width equal to a width of the conductive post; applying a stack encapsulation over the integrated circuit component, over the stack substrate, and around a portion of the conductive post, the protection layer exposed from the stack encapsulation; and mounting a base package under the stack substrate, base package connected to the stack substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.