Manufacturing process for a stacked structure comprising a thin layer bonding to a target substrate
US8481409B2 · kind B2 · utility
2Cited by
14References
15Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 23, 2005 |
| Grant date | Jul 9, 2013 |
| Priority date | — |
| Expiry date | Oct 6, 2027 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76256
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The invention relates to a process for manufacturing a stacked structure comprising at least one thin layer bonding to a target substrate, comprising the following steps:
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.