Semiconductor device package
US8501539B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 12, 2009 |
| Grant date | Aug 6, 2013 |
| Priority date | — |
| Expiry date | Apr 13, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming a semiconductor device package includes providing a lead frame array having a plurality of leads. Each of the plurality of leads includes an opening extending through the lead from a first surface of the lead to a second surface of the lead, opposite the first surface, and each of the openings is at least partially filled with a solder wettable material. A plurality of semiconductor devices are attached to the lead frame array. The plurality of semiconductor devices are encapsulated, and, after encapsulating, the plurality of semiconductor devices are separated along separation lines which intersect the openings.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.