Load request scheduling in a cache hierarchy
US8521982B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 15, 2009 |
| Grant date | Aug 27, 2013 |
| Priority date | — |
| Expiry date | Aug 20, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/1024
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system and method for tracking core load requests and providing arbitration and ordering of requests. When a core interface unit (CIU) receives a load operation from the processor core, a new entry in allocated in a queue of the CIU. In response to allocating the new entry in the queue, the CIU detects contention between the load request and another memory access request. In response to detecting contention, the load request may be suspended until the contention is resolved. Received load requests may be stored in the queue and tracked using a least recently used (LRU) mechanism. The load request may then be processed when the load request resides in a least recently used entry in the load request queue. CIU may also suspend issuing an instruction unless a read claim (RC) machine is available. In another embodiment, CIU may issue stored load requests in a specific priority order.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.