High performance dielectric stack for DRAM capacitor

US8546236B2 · kind B2 · utility

Assignee

• INTERMOLECULAR, INC. · US

Inventors

• Sandra G. Malhotra · San Jose, US
• Hanhong Chen · Milpitas, US
• Wim Deweerd · San Jose, US
• Mitsuhiro Horikawa · Tokyo, JP
• Kenichi Koyanagi · Kure, JP
• Hiroyuki Ode · Kure, JP
• Xiangxin Rui · Campbell, US

Key dates

• Filing date: Jan 10, 2013
• Grant date: Oct 1, 2013
• Expiry date: Jan 10, 2033

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D1/696

Abstract

A method for fabricating a DRAM capacitor stack is described wherein the dielectric material is a multi-layer stack formed from a highly-doped material combined with a lightly or non-doped material. The highly-doped material remains amorphous with a crystalline content of less than 30% after an annealing step. The lightly or non-doped material becomes crystalline with a crystalline content of equal to or greater than 30% after an annealing step. The dielectric multi-layer stack maintains a high k-value while minimizing the leakage current and the EOT value.