Method for evaluating oxide dielectric breakdown voltage of a silicon single crystal wafer
US8551246B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 7, 2009 |
| Grant date | Oct 8, 2013 |
| Priority date | — |
| Expiry date | Dec 25, 2029 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T428/24355
- WIPO fieldSurface technology, coating
- WIPO sectorChemistry
Abstract
A method for manufacturing a silicon single crystal wafer, having at least: a step of preparing a silicon single crystal ingot; a step of slicing the silicon single crystal ingot to fabricate a plurality of sliced substrates; a processing step of processing the plurality of sliced substrates into a plurality of substrates by performing at least one of lapping, etching, and polishing; a step of sampling at least one from the plurality of substrates; a step of measuring surface roughness of the substrate sampled at the sampling step by an AFM and obtaining an amplitude (an intensity) of a frequency band corresponding to a wavelength of 20 nm to 50 nm to make a judgment of acceptance; and a step of sending the substrate to the next step if a judgment result is acceptance or performing reprocessing if the judgment result is rejection.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.