Electronic component package fabrication method and structure
US8552557B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 15, 2011 |
| Grant date | Oct 8, 2013 |
| Priority date | — |
| Expiry date | Feb 8, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/351
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An electronic component package includes a RDL pattern comprising a redistribution pattern terminal. A buildup dielectric layer is formed on the RDL pattern, the buildup dielectric layer having a redistribution pattern terminal aperture exposing the redistribution pattern terminal. An interconnection ball is formed within the redistribution pattern terminal aperture and on the redistribution pattern terminal. The interconnection ball includes an enclosed portion having an outer concave surface within the buildup dielectric layer. The angle of intersection between the outer concave surface of the interconnection ball and the redistribution pattern is less than 90°. This minimizes stress between the interconnection ball and the redistribution pattern which, in turn, minimizes failure of the bond between the interconnection ball and the redistribution pattern.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.