Bulk substrate FET integrated on CMOS SOI

US8558313B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Anthony I. Chou · Beacon, US
• Arvind Kumar · Beaverton, US
• Shreesh Narasimha · Beacon, US
• Ning Su · Hopewell Junction, US
• Huiling Shang · Bethlehem, US

Key dates

• Filing date: Mar 21, 2012
• Grant date: Oct 15, 2013
• Expiry date: Mar 21, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D86/01

Abstract

An integrated circuit is provided that integrates an bulk FET and an SOI FET on the same chip, where the bulk FET includes a gate conductor over a gate oxide formed over a bulk substrate, where the gate dielectric of the bulk FET has the same thickness and is substantially coplanar with the buried insulating layer of the SOI FET. In a preferred embodiment, the bulk FET is formed from an SOI wafer by forming bulk contact trenches through the SOI layer and the buried insulating layer of the SOI wafer adjacent an active region of the SOI layer in a designated bulk device region. The active region of the SOI layer adjacent the bulk contact trenches forms the gate conductor of the bulk FET which overlies a portion of the underlying buried insulating layer, which forms the gate dielectric of the bulk FET.