Dual storage node memory
US8564042B2 · kind B2 · utility
1Cited by
2References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 5, 2007 |
| Grant date | Oct 22, 2013 |
| Priority date | — |
| Expiry date | Oct 1, 2029 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B69/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An embodiment of the present invention is directed to a memory cell. The memory cell includes a first charge storage element and a second charge storage element, wherein the first and second charge storage elements include nitrides. The memory cell further includes an insulating layer formed between the first and second charge storage elements. The insulating layer provides insulation between the first and second charge storage elements.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.