High-k dielectric gate structures resistant to oxide growth at the dielectric/silicon substrate interface and methods of manufacture thereof
US8575709B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 24, 2012 |
| Grant date | Nov 5, 2013 |
| Priority date | — |
| Expiry date | Jul 24, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0223
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Methods for fabricating gate electrode/high-k dielectric gate structures having an improved resistance to the growth of silicon dioxide (oxide) at the dielectric/silicon-based substrate interface. In an embodiment, a method of forming a transistor gate structure comprises: incorporating nitrogen into a silicon-based substrate proximate a surface of the substrate; depositing a high-k gate dielectric across the silicon-based substrate; and depositing a gate electrode across the high-k dielectric to form the gate structure. In one embodiment, the gate electrode comprises titanium nitride rich in titanium for inhibiting diffusion of oxygen.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.