Germanium-based quantum well devices

US8592803B2 · kind B2 · utility

Assignee

• Intel Corporation · US

Inventors

• Ravi Pillarisetty · Portland, US
• Been-Yin Jin · Lake Oswego, US
• Benjamin Chu-Kung · Portland, US
• Matthew V. Metz · Portland, US
• Jack T. Kavalieros · Portland, US
• Marko Radosavljevic · Portland, US
• Roza Kotlyar · Portland, US
• Willy Rachmady · Beaverton, US
• Niloy Mukherjee · Beaverton, US
• Gilbert Dewey · Beaverton, US
• Robert S. Chau · Beaverton, US

Key dates

• Filing date: Apr 9, 2012
• Grant date: Nov 26, 2013
• Expiry date: May 22, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/691
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A quantum well transistor has a germanium quantum well channel region. A silicon-containing etch stop layer provides easy placement of a gate dielectric close to the channel. A group III-V barrier layer adds strain to the channel. Graded silicon germanium layers above and below the channel region improve performance. Multiple gate dielectric materials allow use of a high-k value gate dielectric.