Semiconductor device packages with protective layer and related methods
US8592962B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 29, 2011 |
| Grant date | Nov 26, 2013 |
| Priority date | — |
| Expiry date | Nov 16, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A Quad Flat No Leads (QFN) package includes a lead frame, a chip, an encapsulant, and a protective layer. The lead frame includes a plurality of leads. Each of the leads has a lower surface that is divided into a contact area and a non-contact area. The chip is configured on and electrically connected to the lead frame. The encapsulant encapsulates the chip and the leads and fills spaces between the leads. The contact areas and the non-contact areas of the leads are exposed by the encapsulant. The protective layer covers the non-contact areas of the leads.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.