Patent · US Active

Method and system for routing electrical connections of semiconductor chips

US8598709B2 · kind B2 · utility

1Cited by

5References

24Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Thorsten Meyer · Regensburg, DE
Gottfried Beer · Nittendorf, DE
Christian Geissler · Teugn, DE
Thomas Ort · Veitsbronn, DE
Klaus Pressel · Regensburg, DE
Bernd Waidhas · Nittendorf, DE
Andreas Wolter · Regensburg, DE

Key dates

Filing date	Aug 31, 2010
Grant date	Dec 3, 2013
Priority date	—
Expiry date	Jan 3, 2031

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/18162
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A method and a system for routing electrical connections are disclosed. A semiconductor device includes a first semiconductor chip and a routing plane having a plurality of routing lines. A first connecting line is electrically coupled to the first semiconductor chip and one of the plurality of routing lines and a second connecting line is electrically coupled to the one of the plurality of routing lines and to one of a second semiconductor chip or a first external contact element.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.