Data line management in a memory device
US8619474B2 · kind B2 · utility
11Cited by
1References
40Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 10, 2009 |
| Grant date | Dec 31, 2013 |
| Priority date | — |
| Expiry date | Apr 11, 2031 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5621
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Memory devices and methods are disclosed, such as devices configured to apply a first program inhibit bias to data lines during a first portion of a program operation and to apply a second program inhibit bias to data lines during a second portion of the program operation. The second program inhibit bias is greater than the first program inhibit bias.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.