Avoiding degradation of chalcogenide material during definition of multilayer stack structure

US8623697B2 · kind B2 · utility

Assignee

• Micron Technology, Inc. · US

Inventors

• Michele Magistretti · Gessate, IT
• Pietro Petruzza · Arcore, IT
• Samuele Sciarrillo · Merate, IT
• Cristina Casellato · Vimercate, IT

Key dates

• Filing date: Dec 31, 2008
• Grant date: Jan 7, 2014
• Expiry date: Feb 18, 2029

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10N70/8828

Abstract

A storage element structure for phase change memory (PCM) cell and a method for forming such a structure are disclosed. The method of forming a storage element structure, comprises providing a multilayer stack comprising a chalcogenide layer (206), a metal cap layer (208), and a dielectric hard mask layer (210), depositing and patterning a photo resist layer (212) on top of the multilayer stack, etching the dielectric hard mask layer using the photo resist layer as etch mask, after the dielectric hard mask layer is etched, removing the photo resist layer before etching the chalcogenide, etching the chalcogenide layer using the dielectric hard mask layer as etch mask, depositing a spacer dielectric (214) over the multilayer stack and anisotropically etching the spacer dielectric to form sidewall spacers (216) for the multilayer stack.