Samuele Sciarrillo
28Patents
6h-index
18Co-inventors
62Inventor score
Filing activity: Dec 31, 2008 → Sep 14, 2022
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9577010B2 | Cross-point memory and methods for fabrication of same | Electricity | 25 | Active |
| US9257431B2 | Memory cell with independently-sized electrode | Electricity | 24 | Active |
| US9640588B2 | Memory cell with independently-sized elements | Electricity | 22 | Active |
| US8623697B2 | Avoiding degradation of chalcogenide material during definition of multilayer stack structure | Electricity | 20 | Active |
| US9806129B2 | Cross-point memory and methods for fabrication of same | Electricity | 11 | Active |
| US10854674B2 | Cross-point memory and methods for fabrication of same | Electricity | 6 | Active |
| US9246100B2 | Memory cell array structures and methods of forming the same | Physics | 4 | Active |
| US9773844B2 | Memory cell array structures and methods of forming the same | Physics | 4 | Active |
| US10084016B2 | Cross-point memory and methods for fabrication of same | Electricity | 3 | Active |
| US10157965B2 | Cross-point memory and methods for fabrication of same | Electricity | 2 | Active |
| US10163978B2 | Memory cell with independently-sized elements | Electricity | 2 | Active |
| US9443763B2 | Methods for forming interconnections between top electrodes in memory cells by a two-step chemical-mechanical polishing (CMP) process | Electricity | 2 | Active |
| US9831428B2 | Memory cell with independently-sized electrode | Electricity | 2 | Active |
| US10790226B2 | Integrated electronic device with a redistribution region and a high resilience to mechanical stresses and method for its preparation | Electricity | 1 | Active |
| US10777743B2 | Memory cell with independently-sized electrode | Electricity | 1 | Active |
| US10573689B2 | Memory cell with independently-sized elements | Electricity | 1 | Active |
| US10566283B2 | Semiconductor device and a corresponding method of manufacturing semiconductor devices | Electricity | 0 | Active |
| US12021046B2 | Redistribution layer and integrated circuit including redistribution layer | Electricity | 0 | Active |
| US11011579B2 | Cross-point memory and methods for fabrication of same | Electricity | 0 | Active |
| US10886332B2 | Memory cell with independently-sized elements | Electricity | 0 | Active |
| US11587866B2 | Integrated electronic device with a redistribution region and a high resilience to mechanical stresses and method for its preparation | Electricity | 0 | Active |
| US10439001B2 | Cross-point memory and methods for fabrication of same | Electricity | 0 | Active |
| US10593625B2 | Semiconductor device and a corresponding method of manufacturing semiconductor devices | Electricity | 0 | Active |
| US10854675B2 | Cross-point memory and methods for fabrication of same | Electricity | 0 | Active |
| US11600665B2 | Cross-point memory and methods for fabrication of same | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.