Memory system including variable write command scheduling
US8635417B2 · kind B2 · utility
7Cited by
10References
28Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 10, 2012 |
| Grant date | Jan 21, 2014 |
| Priority date | — |
| Expiry date | May 10, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/4239
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system includes a host device that may be configured to initiate memory requests to a system memory. The system also includes a memory controller that may be configured receive the memory requests and to format the memory requests into memory transactions that are conveyed to the memory device via a memory interface. The memory transactions include a plurality of memory write command types. Each memory write command type corresponds to a different respective schedule for conveying a corresponding data payload.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.