Patent assignee · US · COMPANY

MOSYS, INC.

79Patents
70Active
79Granted
54Portfolio score

Filing activity: Jul 15, 1996 → Feb 18, 2018 · 35 expiring within 5 years

Most-cited patents

PatentTitleAreaCited byStatus
US5784705A Method and structure for performing pipeline burst accesses in a semiconductor memory Physics 96 Expired
US8044724B2 Low jitter large frequency tuning LC PLL for multi-speed clocking applications Electricity 42 Active
US7353438B2 Transparent error correcting memory Physics 25 Expired
US7447104B2 Word line driver for DRAM embedded in a logic process Electricity 24 Active
US7671401B2 Non-volatile memory in CMOS logic process Physics 23 Active
US7533222B2 Dual-port SRAM memory using single-port memory cell Physics 23 Active
US9037928B2 Memory device with background built-in self-testing and background built-in self-repair Physics 22 Active
US7392456B2 Predictive error correction code generation facilitating high-speed byte-write in a semiconductor memory Physics 22 Expired
US7391647B2 Non-volatile memory in CMOS logic process and method of operation thereof Physics 21 Expired
US8901747B2 Semiconductor chip layout Electricity 15 Active
US7323379B2 Fabrication process for increased capacitance in an embedded DRAM memory Electricity 14 Expired
US8161355B2 Automatic refresh for improving data retention and endurance characteristics of an embedded non-volatile memory in a standard CMOS logic process Physics 11 Active
US8274326B2 Equalization circuit Electricity 10 Active
US6259651A Method for generating a clock phase signal for controlling operation of a DRAM array Physics 10 Expired
US7634707B2 Error detection/correction method Emerging Cross-Sectional Technologies 9 Expired
US9361196B2 Memory device with background built-in self-repair using background built-in self-testing Physics 8 Active
US7929359B2 Embedded DRAM with bias-independent capacitance Electricity 8 Active
US6078547A Method and structure for controlling operation of a DRAM array Physics 7 Expired
US7633810B2 Non-volatile memory embedded in a conventional logic process and methods for operating same Physics 7 Active
US8635417B2 Memory system including variable write command scheduling Physics 7 Active
US6147535A Clock phase generator for controlling operation of a DRAM array Physics 6 Expired
US8527676B2 Reducing latency in serializer-deserializer links Physics 5 Active
US9054578B2 Hybrid driver including a turbo mode Electricity 5 Active
US7382658B2 Non-volatile memory embedded in a conventional logic process and methods for operating same Physics 5 Active
US8269538B2 Signal alignment system Physics 5 Active

Source: USPTO / EPO open patent data. Counts and citation impact are objective bibliographic measures.