Jay B. Patel
22Patents
5h-index
27Co-inventors
65Inventor score
Filing activity: Sep 14, 2007 → Nov 12, 2018
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US9037928B2 | Memory device with background built-in self-testing and background built-in self-repair | Physics | 22 | Active |
| US7557605B2 | Heterogeneous configurable integrated circuit | Electricity | 14 | Active |
| US10324642B2 | Peripheral component interconnect express (PCIe) solid state drive (SSD) accelerator | Emerging Cross-Sectional Technologies | 8 | Active |
| US9361196B2 | Memory device with background built-in self-repair using background built-in self-testing | Physics | 8 | Active |
| US8635417B2 | Memory system including variable write command scheduling | Physics | 7 | Active |
| US8527676B2 | Reducing latency in serializer-deserializer links | Physics | 5 | Active |
| US10114558B2 | Integrated main memory and coprocessor with low latency | Physics | 5 | Active |
| US8832336B2 | Reducing latency in serializer-deserializer links | Physics | 4 | Active |
| US9354823B2 | Memory system including variable write burst and broadcast command scheduling | Physics | 3 | Active |
| US11221764B2 | Partitioned memory with shared memory resources and configurable functions | Physics | 2 | Active |
| US7773595B2 | System and method for parsing frames | Electricity | 2 | Active |
| US8473695B2 | Memory system including variable write command scheduling | Physics | 1 | Active |
| US9496009B2 | Memory with bank-conflict-resolution (BCR) module including cache | Physics | 1 | Active |
| US8370725B2 | Communication interface and protocol | Electricity | 1 | Active |
| US9529569B2 | Method and apparatus for randomizer | Physics | 1 | Active |
| US9971567B2 | Method and apparatus for randomizer | Physics | 0 | Active |
| US9921755B2 | Integrated main memory and coprocessor with low latency | Physics | 0 | Active |
| US10883088B2 | Biological upgrading of hydrocarbon streams with oxygenases | Chemistry; Metallurgy | 0 | Active |
| US9667546B2 | Programmable partitionable counter | Electricity | 0 | Active |
| US8824468B2 | System and method for parsing frames | Electricity | 0 | Active |
| US8050262B2 | System and method for parsing frames | Electricity | 0 | Active |
| US9118611B2 | Data synchronization for circuit resources without using a resource buffer | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.