Patent · US Active

Embedded integrated circuit package and method for manufacturing an embedded integrated circuit package

US8648456B1 · kind B1 · utility

11Cited by

3References

20Claims

0Family size

Assignee

Infineon Technologies AG · DE

Inventors

Joachim Mahler · Regensburg, DE
Edward Fuergut · Nuremberg, DE
Khalil Hosseini · Weihmichl, DE
Georg Meyer-Berg · Birkenfeld, DE

Key dates

Filing date	Jul 18, 2012
Grant date	Feb 11, 2014
Priority date	—
Expiry date	Jul 18, 2032

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/1815
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A embedded integrated circuit package is provided, the embedded integrated circuit package including: at least one chip arranged over a chip carrier, the at least one chip including a plurality of chip contact pads; encapsulation material formed over the chip carrier and at least partially surrounding the at least one chip; a plurality of electrical interconnects formed through the encapsulation material, wherein each electrical interconnect is electrically connected to a chip contact pad; and a structure formed between the electrical interconnects of the embedded integrated circuit package, wherein the structure increases the creepage resistance between the electrical interconnects.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.