Integrated circuit package auto-routing
US8656333B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 7, 2012 |
| Grant date | Feb 18, 2014 |
| Priority date | — |
| Expiry date | May 7, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A plurality of approaches for forming a semiconductor device using an adaptive patterning method is disclosed. Some approaches include placing a semiconductor die unit on a carrier element, calculating trace geometry for a second set of traces, constructing a prestratum comprising a first set of traces, and constructing the second set of traces according to the calculated trace geometry. Forming the semiconductor device may further include electrically connecting at least one of the first set of traces to at least one of the second set of traces, and electrically connecting at least one bond pad of the semiconductor die unit to a destination pad through the at least one of the first set of traces and the at least one of the second set of traces.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.