Metal gate stack formation for replacement gate technology

US8664103B2 · kind B2 · utility

Assignee

• GlobalFoundries Inc. · KY

Inventors

• Klaus Hempel · Dresden, DE
• Andy Wei · Queensbury, US
• Robert Binder · Dresden, DE
• Joachim Metzger · Rockenberg, DE

Key dates

• Filing date: Jun 7, 2011
• Grant date: Mar 4, 2014
• Expiry date: May 13, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/685
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Generally, the subject matter disclosed herein relates to modern sophisticated semiconductor devices and methods for forming the same, wherein a reduced threshold voltage (Vt) may be achieved in HK/MG transistor elements that are manufactured based on replacement gate electrode integrations. One illustrative method disclosed herein includes forming a first metal gate electrode material layer above a gate dielectric material layer having a dielectric constant of approximately 10 or greater. The method further includes exposing the first metal gate electrode material layer to an oxygen diffusion process, forming a second metal gate electrode material layer above the first metal gate electrode material layer, and adjusting an oxygen concentration gradient and a nitrogen concentration gradient in at least the first metal gate electrode material layer and the gate dielectric material layer.