Integrated circuit packaging system with interlock and method of manufacture thereof
US8669649B2 · kind B2 · utility
2Cited by
11References
17Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 24, 2010 |
| Grant date | Mar 11, 2014 |
| Priority date | — |
| Expiry date | Oct 3, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/18301
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacture of an integrated circuit packaging system includes: forming a package paddle; forming a lead adjacent the package paddle, the lead having a lead overhang protruding from a lead non-horizontal side and a lead ridge protruding from the lead non-horizontal side; mounting an integrated circuit over the package paddle; connecting an electrical connector to the lead and the integrated circuit; and forming an encapsulation over the integrated circuit, the lead, and the package paddle, the encapsulation under the lead overhang.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.