Semiconductor structure having NFET extension last implants

US8673699B2 · kind B2 · utility

Assignee

• International Business Machines Corporation · US

Inventors

• Thomas N. Adam · Slingerlands, US
• Kangguo Cheng · Schenectady, US
• Bruce B. Doris · Brewster, US
• Bala Haran · Columbia, US
• Pranita Kulkarni · Slingerlands, US
• Amlan Majumdar · White Plains, US
• Stefan Schmitz · Stuttgart, DE

Key dates

• Filing date: Jul 17, 2012
• Grant date: Mar 18, 2014
• Expiry date: Jul 17, 2032

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D86/201

Abstract

A method of forming a semiconductor structure which includes an extremely thin silicon-on-insulator (ETSOI) semiconductor structure having a PFET portion and an NFET portion, a gate structure in the PFET portion and the NFET portion, a high quality nitride spacer adjacent to the gate structures in the PFET portion and the NFET portion and a doped faceted epitaxial silicon germanium raised source/drain (RSD) in the PFET portion. An amorphous silicon layer is formed on the RSD in the PFET portion. A faceted epitaxial silicon RSD is formed on the ETSOI adjacent to the high quality nitride in the NFET portion. The amorphous layer in the PFET portion prevents epitaxial growth in the PFET portion during formation of the RSD in the NFET portion. Extensions are ion implanted into the ETSOI underneath the gate structure in the NFET portion.