Premetal dielectric integration process

US8685867B1 · kind B1 · utility

Assignee

• Novellus Systems, Inc. · US

Inventors

• Michal Danek · Cupertino, US
• Bart van Schravendijk · Sunnyvale, US
• Nerissa Draeger · Milpitas, US
• Lakshminarayana Nittala · Sunnyvale, US

Key dates

• Filing date: Dec 8, 2011
• Grant date: Apr 1, 2014
• Expiry date: Dec 8, 2031

Classification

• Technology area (CPC H): Electricity
• CPC primary: H01L21/76837
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

Provided herein are novel pre-metal dielectric (PMD) integration schemes. According to various embodiments, the methods involve depositing flowable dielectric material to fill trenches or other gaps between gate structures in a front end of line (FEOL) fabrication process. The flowable dielectric material may be partially densified to form dual density filled gaps having a low density region capped by a high density region. In certain embodiments, the methods include further treating at least a portion of the gap fill material after subsequent process operations such as chemical mechanical planarization (CMP) or contact etching.