Method for forming integrated circuit assembly
US8689437B2 · kind B2 · utility
6Cited by
14References
20Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 24, 2009 |
| Grant date | Apr 8, 2014 |
| Priority date | — |
| Expiry date | Dec 23, 2031 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49204
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for forming an integrated circuit assembly comprises forming first solder bumps on a first die, and forming a first structure comprising the first die, the first solder bumps, a first flux, and a first substratum. The first die is placed upon the first substratum. The first solder bumps are between the first die and the first substratum. The first flux holds the first die substantially flat and onto the first substratum.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.