Verification algorithm for metal-oxide resistive memory
US8699258B2 · kind B2 · utility
11Cited by
7References
23Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 18, 2011 |
| Grant date | Apr 15, 2014 |
| Priority date | — |
| Expiry date | May 11, 2032 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2213/79
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Memory devices and methods for operating such devices are described which can effectively program the metal-oxide memory elements in an array, while also avoiding applying unnecessarily high voltage pulses. Programming operations described herein include applying a lower voltage pulse across a metal-oxide memory element to establish a desired resistance state, and only applying a higher voltage pulse when the lower voltage pulse is insufficient to program the memory element. In doing so, issues associated with applying unnecessarily high voltages across the memory element can be avoided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.