Memory array with an air gap between memory cells and the formation thereof
US8716084B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 24, 2013 |
| Grant date | May 6, 2014 |
| Priority date | — |
| Expiry date | May 24, 2033 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0413
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming a memory array includes forming a dielectric over a semiconductor, forming a charge-storage structure over the dielectric, forming an isolation region through the dielectric and the charge-storage structure and extending into the semiconductor, recessing the isolation region to a level below a level of an upper surface of the dielectric and at or above a level of an upper surface of the semiconductor, forming an access line over the charge-storage structure and the recessed isolation region, and forming an air gap over the recessed isolation region so that the air gap passes through the charge-storage structure, so that the air gap extends to and terminates at a bottom surface of the access line, and so that the entire air gap is between the bottom surface of the access line and the upper surface of the semiconductor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.