Christopher J. Larsen
25Patents
3h-index
50Co-inventors
62Inventor score
Filing activity: Sep 22, 2011 → Dec 20, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US10283520B2 | Elevationally-extending string of memory cells individually comprising a programmable charge storage transistor and method of forming an elevationally-extending string of memory cells individually comprising a programmable charge storage transistor | Electricity | 19 | Active |
| US10083981B2 | Memory arrays, and methods of forming memory arrays | Electricity | 18 | Active |
| US8716084B2 | Memory array with an air gap between memory cells and the formation thereof | Electricity | 4 | Active |
| US9082714B2 | Use of etch process post wordline definition to improve data retention in a flash memory device | Electricity | 3 | Active |
| US9153455B2 | Methods of forming semiconductor device structures, memory cells, and arrays | Electricity | 2 | Active |
| US11665894B2 | Microelectronic devices, memory devices, and electronic systems | Electricity | 1 | Active |
| US11482536B2 | Electronic devices comprising memory pillars and dummy pillars including an oxide material, and related systems and methods | Electricity | 1 | Active |
| US10304853B2 | Memory arrays, and methods of forming memory arrays | Electricity | 1 | Active |
| US11387245B2 | Electronic devices including pillars in array regions and non-array regions, and related systems and methods | Electricity | 0 | Active |
| US11101280B2 | Memory arrays and methods used in forming a memory array | Electricity | 0 | Active |
| US11785775B2 | Methods of forming microelectronic devices, and related microelectronic devices, memory devices, and electronic systems | Electricity | 0 | Active |
| US12250821B2 | Electronic devices including pillars in array regions and non-array regions | Electricity | 0 | Active |
| US12004351B2 | Integrated assemblies, and methods of forming integrated assemblies | Electricity | 0 | Active |
| US11600494B2 | Arrays of elevationally-extending strings of memory cells and methods used in forming an array of elevationally-extending strings of memory cells | Electricity | 0 | Active |
| US10665469B2 | Arrays of elevationally-extending strings of memory cells and methods used in forming an array of elevationally-extending strings of memory cells | Electricity | 0 | Active |
| US12127401B2 | Methods of forming microelectronic devices | Electricity | 0 | Active |
| US12041775B2 | Electronic devices comprising memory pillars and dummy pillars including an oxide material, and related systems and methods | Electricity | 0 | Active |
| US11355607B2 | Semiconductor device structures with liners | Electricity | 0 | Active |
| US10658382B2 | Elevationally-extending string of memory cells individually comprising a programmable charge storage transistor and method of forming an elevationally-extending string of memory cells individually comprising a programmable charge storage transistor | Electricity | 0 | Active |
| US10762939B2 | Computer memory | Physics | 0 | Active |
| US10541252B2 | Memory arrays, and methods of forming memory arrays | Electricity | 0 | Active |
| US11037797B2 | Arrays of elevationally-extending strings of memory cells and methods used in forming an array of elevationally-extending strings of memory cells | Electricity | 0 | Active |
| US11430809B2 | Integrated assemblies, and methods of forming integrated assemblies | Electricity | 0 | Active |
| US10790290B2 | 3D NAND with integral drain-end select gate (SGD) | Electricity | 0 | Active |
| US11871575B2 | Electronic devices including pillars in array regions and non-array regions | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.