Integrated circuit packaging system with ultra-thin chip and method of manufacture thereof
US8716108B2 · kind B2 · utility
0Cited by
2References
14Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 21, 2012 |
| Grant date | May 6, 2014 |
| Priority date | — |
| Expiry date | May 12, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15787
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of manufacture of an integrated circuit packaging system includes: providing a circuit substrate having an active side opposite to an inactive portion; attaching a nonconductive cover to the active side; forming a separation-gap partially cutting into the nonconductive cover and the circuit substrate to a kerf depth; attaching a back-grinding tape to the nonconductive cover; removing a portion of the inactive portion; and exposing the nonconductive cover by removing the back-grinding tape.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.