Electrically interconnected stacked die assemblies
US8723332B2 · kind B2 · utility
28Cited by
117References
38Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 20, 2008 |
| Grant date | May 13, 2014 |
| Priority date | — |
| Expiry date | Jan 19, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/14
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In die stack assembly configurations successive die in the stack are offset at a die edge at which die pads are situated, and the die are interconnected by electrically conductive traces. In some embodiments the electrically conductive traces are formed of an electrically conductive polymer. An electrically insulative conformal coating is provided having openings at die pads that are electrically connected.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.