Integrated circuits including multi-gate transistors locally interconnected by continuous fin structure and methods for the fabrication thereof
US8729609B2 · kind B2 · utility
6Cited by
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10Claims
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Key dates
| Filing date | Feb 23, 2010 |
| Grant date | May 20, 2014 |
| Priority date | — |
| Expiry date | Mar 13, 2031 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/038
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Embodiments of an integrated circuit are provided. In one embodiment, the integrated circuit includes a substrate and a plurality of locally interconnected multi-gate transistors. The plurality of locally interconnected multi-gate transistors includes a continuous fin structure formed on the substrate and first and second multi-gate transistors formed on the substrate and including first and second fin segments of the continuous fin structure, respectively. The continuous fin structure electrically interconnects the first and second multi-gate transistors.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.