Discontinuous guard ring
US8729664B2 · kind B2 · utility
5Cited by
10References
9Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 2, 2012 |
| Grant date | May 20, 2014 |
| Priority date | — |
| Expiry date | Apr 2, 2032 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit chip comprising a guard ring formed on a semiconductor substrate that surrounds the active region of the integrated circuit chip and extends from the semiconductor substrate through one or more of a plurality of wiring levels. The guard ring comprises stacked metal lines with spaces breaking up each respective metal line. Each space may be formed such that it partially overlies the space in the metal line directly below but does not overlie any other space. Alternatively, each space may also be formed such that each space is at least completely overlying the space in the metal line below it.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.