Mark D. Levy
59Patents
3h-index
67Co-inventors
69Inventor score
Filing activity: Jan 22, 1996 → Apr 11, 2024
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US7823106B2 | Variable performance ranking and modification in design for manufacturability of circuits | Emerging Cross-Sectional Technologies | 25 | Active |
| US5664958A | Electrical connector for worn electrical outlets | Electricity | 13 | Expired |
| US8729664B2 | Discontinuous guard ring | Electricity | 5 | Active |
| US9059233B2 | Formation of an asymmetric trench in a semiconductor substrate and a bipolar semiconductor device having an asymmetric trench isolation region | Electricity | 3 | Active |
| US7060626B2 | Multi-run selective pattern and etch wafer process | Electricity | 3 | Expired |
| US7037824B2 | Copper to aluminum interlayer interconnect using stud and via liner | Electricity | 2 | Expired |
| US9231089B2 | Formation of an asymmetric trench in a semiconductor substrate and a bipolar semiconductor device having an asymmetric trench isolation region | Electricity | 2 | Active |
| US11316064B2 | Photodiode and/or PIN diode structures | Emerging Cross-Sectional Technologies | 2 | Active |
| US7087997B2 | Copper to aluminum interlayer interconnect using stud and via liner | Electricity | 2 | Expired |
| US11152520B1 | Photodetector with reflector with air gap adjacent photodetecting region | Electricity | 1 | Active |
| US11469225B2 | Device integration schemes leveraging a bulk semiconductor substrate having a <111 > crystal orientation | Electricity | 1 | Active |
| US11972999B2 | Unlanded thermal dissipation pillar adjacent active contact | Electricity | 1 | Active |
| US11049932B2 | Semiconductor isolation structures comprising shallow trench and deep trench isolation | Electricity | 1 | Active |
| US11536914B2 | Photodetector array with diffraction gratings having different pitches | Physics | 1 | Active |
| US10312356B1 | Heterojunction bipolar transistors with multiple emitter fingers and undercut extrinsic base regions | Electricity | 1 | Active |
| US11422303B2 | Waveguide with attenuator | Physics | 1 | Active |
| US11437522B2 | Field-effect transistors with a polycrystalline body in a shallow trench isolation region | Electricity | 1 | Active |
| US11923446B2 | High electron mobility transistor devices having a silicided polysilicon layer | Electricity | 1 | Active |
| US11282740B2 | Bulk semiconductor structure with a multi-level polycrystalline semiconductor region and method | Electricity | 1 | Active |
| US12040252B2 | Microfluidic channels sealed with directionally-grown plugs | Electricity | 0 | Active |
| US12411105B2 | Semiconductor structure with frontside port and cavity features for conveying sample to sensing element | Performing Operations; Transporting | 0 | Active |
| US11567277B1 | Distributed Bragg reflectors including periods with airgaps | Physics | 0 | Active |
| US12342626B2 | Switches in bulk substrate | Electricity | 0 | Active |
| US12389622B2 | High electron mobility transistor devices having a silicided polysilicon layer | Electricity | 0 | Active |
| US11978661B2 | Ultralow-K dielectric-gap wrapped contacts and method | Electricity | 0 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.